Quartus II support on EP1K50 (ACEX 1K)

The website claims that Quartus II 11.1sp2 supports legacy devices, do this not include the ACEX 1K devices?

Quartus 11.1sp2 will not support ACEX, FLEX, etc. Those devices are too old.

Just install both version of Quartus. There is no problem having multiple versions of Quartus installed on one machine. I have 9.0SP2, 10.1, and 11.1sp1 all coexisting.

I've started to use VirtualBox and Virtual machines to support legacy tools. That way I can put the entire OS plus installed tools onto an external USB drive, and it does not take space on my laptop drive (other than for the VirtualBox install).

Design software support for ACEX, APEX, FLEX, and HardCopy Stratix device families will not be provided in future versions of the Quartus II software beginning with version 9.1.

tuxcnc pisze:Nawet jak ktoś chce żeby mu LED migał, to zaraz napiszecie że potrzebny jest Cortex ...

blue_17 pisze:w tym rozwiązaniu mógł być by dobry jakiś ARM z systemem operacyjnym ale nie wiem czy to nie przerost formy nad treścią

ACEX 1K Datasheet pisze:ACEX 1K devices are configured at system power-up with data stored in an Altera serial configuration device or provided by a system controller. Altera offers EPC16, EPC2, EPC1, and EPC1441 configuration devices, which configure ACEX 1K devices via a serial data stream. Configuration data can also be downloaded from system RAM or via the Altera MasterBlasterTM, ByteBlasterMVTM, or BitBlasterTM download cables. After an ACEX 1K device has been configured, it can be reconfigured in-circuit by resetting the device and loading new data. Because reconfiguration requires less than 40 ms, real-time changes can be made during system operation.

ACEX 1K devices contain an interface that permits microprocessors to configure ACEX 1K devices serially or in parallel, and synchronously or asynchronously. The interface also enables microprocessors to treat an ACEX 1K device as memory and configure it by writing to a virtual memory location, simplifying device reconfiguration.

Programmable logic devices (PLDs), providing low cost system-on-a-programmable-chip (SOPC) integration in a single device

FPGAs vs. CPLDs pisze:FPGAs are RAM based - they need to be "downloaded" (configured) at each power-up. CPLDs are EEPROM based - they are active at power-up (i.e. as long as they've been programmed at least once...).

251mz pisze:Jest coś takiego jak konfigurator...

man pisze: speedrange [default: 0]

Selects one of four speed ranges:

0: Top speed 312.5kHz; minimum speed 610Hz
1: Top speed 156.25kHz; minimum speed 305Hz
2: Top speed 78.125kHz; minimum speed 153Hz
3: Top speed 39.06kHz; minimum speed 76Hz

Choosing the smallest maximum speed that is above the maximum for any one axis may give improved step regularity at low step speeds.

tuxcnc pisze:FPGA nie programuje się.
Program jest tracony po wyłączeniu zasilania, a po włączeniu trzeba go załadować.
W przypadku Pluto-P załadowanie programu odbywa się przez port lpt i LinuxCNC zajmuje się tym w sposób niezauważalny dla użytkownika.
Dlatego ta sama płytka z FPGA może służyć do różnych celów.

hal man pisze: Note The Pluto P board requires EPP mode. Netmos98xx chips do not work in EPP mode. The Pluto P board will work on some computers and not on others. There is no known pattern to which computers work and which don’t work.

251mz pisze:

markcomp77 pisze:ale PLC w tym projekcie pozwala na ładną separacje funkcji

FPGA

[...]linuxcnc-dev/src/hal/drivers/pluto_step_firmware$ ls *.v -l
-rw-rw-r-- 1 mark mark 5162 sie 20 17:16 main.v
-rw-rw-r-- 1 mark mark 2777 sie 20 17:16 stepgen.v
-rw-rw-r-- 1 mark mark 1804 sie 20 17:16 test_stepgen.v